The new submission deadline is April 4th.
Call for Papers
Memory continues to be a major bottleneck in almost all computing systems. It is becoming more so as more cores and other agents are sharing parts of the memory system, and as applications that run on the cores are becoming increasingly data intensive. Continuing the tradition of eight previous successful incarnations, MSPC 2014 will provide a forum for publishing and discussing all aspects of memory performance and correctness on a variety of systems (multi-core, desktop, embedded, server/cloud, high-performance computing, sensor, etc) and related software and hardware innovations at various levels of the technology stack. We invite new submissions that tackle issues in memory system performance, efficiency, correctness, and dependability in both hardware and software layers. Example areas of interest include but are not limited to the following:
- Hardware, software, and hybrid techniques for better memory performance, correctness, reliability, efficiency
- Memory hierarchy design for chip multiprocessors (CMPs)
- Emerging memory technologies (e.g., Phase Change Memory, MRAM)
- Characterization and analysis of memory systems performance
- Insightful experimental evaluation and analysis of memory-intensive workloads
- Static and dynamic techniques for understanding and improving memory performance and efficiency
- Managed memory and garbage collection optimizations
- Hardware and software techniques for ensuring memory safety and detecting memory-related bugs
- Hardware and software memory models and their impact on programmability and performance
- Memory system issues in accelerator-based computing (e.g., GPGPU)
- Memory system issues in embedded computers and tiny devices
- Prefetching, compression, latency tolerance techniques for memory
- Memory power and energy management techniques
- Memory reliability management techniques
Software, hardware, and hybrid approaches are encouraged. In addition, we solicit papers from practitioners describing problems and experiences with memory performance and correctness in specific application domains.
A PDF version of the call for papers is also available
We encourage the submission of not-fully-polished but provocative short papers (6—8 pages; 8 pages maximum) or position abstracts (1-2 pages; 2 pages maximum). Paper submissions should use standard ACM SIGPLAN conference format (10pt), available at http://www.sigplan.org/authorInformation.htm. Copies of accepted papers will be made available at the workshop and published in the ACM digital library. Submitted papers must not be simultaneously under review for any other conference or journal, and authors should point out any substantial overlap with their previously published or currently submitted work.